[powerpc] support additional interrupt controller types in xen/arch/x86/irq.c
authorkaf24@firebug.cl.cam.ac.uk <kaf24@firebug.cl.cam.ac.uk>
Fri, 14 Jul 2006 09:31:36 +0000 (10:31 +0100)
committerkaf24@firebug.cl.cam.ac.uk <kaf24@firebug.cl.cam.ac.uk>
Fri, 14 Jul 2006 09:31:36 +0000 (10:31 +0100)
PowerPC #includes xen/arch/x86/irq.c, so we need to support MPIC interrupt
controllers here.
From: Hollis Blanchard <hollisb@us.ibm.com>
Signed-off-by: Keir Fraser <keir@xensource.com>
xen/arch/x86/irq.c
xen/include/xen/irq.h

index b12c2f5ba09a42328b5874f8e2739fa1454ac925..a14011d650f6c0f61d2506605795eab732908fb3 100644 (file)
@@ -387,10 +387,6 @@ int pirq_acktype(int irq)
     if ( !strcmp(desc->handler->typename, "IO-APIC-edge") )
         return ACKTYPE_NONE;
 
-    /* Legacy PIC interrupts can be acknowledged from any CPU. */
-    if ( !strcmp(desc->handler->typename, "XT-PIC") )
-        return ACKTYPE_UNMASK;
-
     /*
      * Level-triggered IO-APIC interrupts need to be acknowledged on the CPU
      * on which they were received. This is because we tickle the LAPIC to EOI.
@@ -398,6 +394,17 @@ int pirq_acktype(int irq)
     if ( !strcmp(desc->handler->typename, "IO-APIC-level") )
         return ioapic_ack_new ? ACKTYPE_EOI : ACKTYPE_UNMASK;
 
+    /* Legacy PIC interrupts can be acknowledged from any CPU. */
+    if ( !strcmp(desc->handler->typename, "XT-PIC") )
+        return ACKTYPE_UNMASK;
+
+    if ( strstr(desc->handler->typename, "MPIC") )
+    {
+        if ( desc->status & IRQ_LEVEL )
+            return (desc->status & IRQ_PER_CPU) ? ACKTYPE_EOI : ACKTYPE_UNMASK;
+        return ACKTYPE_NONE; /* edge-triggered => no final EOI */
+    }
+
     BUG();
     return 0;
 }
index b3f8f9d548c2f6d3466ea07efaaa1458b57790f1..f1c1ef4a7c8660338dc204c41a9fb65b707019ec 100644 (file)
@@ -22,6 +22,7 @@ struct irqaction
 #define IRQ_PENDING    4       /* IRQ pending - replay on enable */
 #define IRQ_REPLAY     8       /* IRQ has been replayed but not acked yet */
 #define IRQ_GUEST       16      /* IRQ is handled by guest OS(es) */
+#define IRQ_LEVEL       64      /* IRQ level triggered */
 #define IRQ_PER_CPU     256     /* IRQ is per CPU */
 
 /*